This invention generally relates to integrated device fabrication; and more specifically, the invention relates to selective removal processes for integrated device fabrication. Even more specifically, the invention relates to processes that may be used effectively to remove selectively Ta—TaN layers or liners during the fabrication of an integrated device and that are compatible with low k dielectric materials.
Generally, in the fabrication of integrated devices, various layers of materials, including copper and dielectric materials, are formed and patterned or etched to produce the desired end product. For example, Back-End-Of-Line (BEOL) interconnects are commonly fabricated using a combination of sequential layering and patterning of metal and dielectric films to produce an integrated multilevel wiring architecture for various semiconductor devices.
Advanced semiconductor devices typically require integrated interconnects with more inputs and outputs, greater current capacity, less signal delay and improved electrical noise characteristics. To this extent, BEOL interconnects have advanced by shrinking the cross-section of the wiring, increasing the levels of wiring, using better conductivity metals, and also reducing the intralevel capacitance by using low dielectric constant (low k) materials.
Of particular relevance is the implementation of low k materials in the BEOL structure. These materials have been extremely challenging to implement because they are mechanically weak and chemically sensitive to many of the processes used to integrate BEOL structures. Of particular concern is direct chemical mechanical polishing (CMP) of low k dielectrics, as is commonly required for copper damascene in silicon dioxide. Mechanical damage, water penetration and slurry incorporation can all cause permanent damage to the low k dielectric. Furthermore, some dielectric materials are used in BEOL devices as integration or reliability enhancement layers and are detrimental to maintaining a low k BEOL structure. It is therefore necessary to discover new processes and integration techniques that are compatible with low k materials to facilitate integration of low k materials into BEOL structures.